Silimate

We’re hiring software interns with VLSI experience + strong coding skills to build/ship our AI-native tools and agent-driven workflows for chip design. This is an in-person role at our Mountain View office, and can be either part-time or full-time effective immediately. This may transition into a full-time role. Who you are: You’re excited about directly contributing to the growth and velocity of a fast-growing startup that is transforming the way chips are built by the entire industry. You are resourceful, a self-starter, and care intensely about the quality of your work. You want to work at a scrappy startup that sets and meets aggressive goals. You enjoy working in-person with others, and are able to come to our Mountain View office multiple times a week. If this sounds like you, please apply to join the team! What you’ll do: Build/ship critical EDA software (Python/C++) to Fortune 500s and chip unicorns Be a liaison with some of our tooling partners Collaborate directly with the founders on key engineering design decisions Minimum requirements: Available for 15-40 hours/week in-person in Mountain View, CA Good at writing/shipping high-quality code (Python/C++) quickly Basic VLSI experience (coursework or projects) Adaptive, data-driven, and works from first principles Benefits: Generous salary Commuting stipend Team meals — Apply to chat with the founders about the details!

We’re looking for a key engineer with significant experience with the VLSI front-end design flow and strong coding skills to help us build/scale chip AI models and agent-driven workflows. Who you are: You are excited about transforming the way chips are built by the entire chip industry. You are resourceful, a self-starter, and care intensely about the quality of your work. You want to work at a scrappy startup that sets and meets aggressive goals. You want to own/drive core product and write/ship code every day. You want to work with our customers/users and translate their feedback into company/product direction. If this sounds like you, please apply to join the team! What you’ll do: Write code (Python/C++) that ships to Fortune 500s and chip unicorns Make software architectural decisions for key product features Translate user feedback into product updates/features Plan core product roadmap and strategy Minimum requirements: Passionate and excited about chips and AI for EDA Experienced with designing ASICs using SystemVerilog and synthesis/verification tools (open-source and/or commercial) Experienced with common front-end EDA tools Good at writing/shipping high-quality code (Python/C++) quickly Basic knowledge of statistics & AI/ML methods Resilient, data-driven, and works from first principles Ideal requirements: 1+ tapeouts (ideally on advanced technology nodes) Contributor to open-source EDA/chip efforts Significant experience with PPA optimization and/or functional correctness convergence Benefits: Generous salary and equity package Full health/vision/dental/401k benefits Team meals — Apply to chat with the founders about the details!

We’re looking for a key engineer with significant AI/ML + LLM experience to build AI-native core tools and models for agent-driven chip design workflows. Who you are: You are excited about transforming the way chips are built by the entire chip industry. You are resourceful, a self-starter, and care intensely about the quality of your work. You want to work at a scrappy startup that sets and meets aggressive goals. You want to own/drive core product and write/ship code every day. You want to work with our customers/users and translate their feedback into company/product direction. If this sounds like you, please apply to join the team! What you’ll do: Develop AI models, core tools, and infrastructure that ship to Fortune 500s and chip unicorns Make architectural decisions for key product features Translate user feedback into product updates/features Plan core product roadmap and strategy Minimum requirements: Highly skilled with Python, C++, PyTorch/torch Strong understanding of traditional ML models, LLMs, foundation models, and agents Experience building ML pipelines Experience fine-tuning and benchmarking LLMs/foundation models Excited about applying AI/ML techniques to chip design Good at shipping high-quality code quickly Resilient, data-driven, and works from first principles Ideal requirements: Have shipped product using LLMs, foundation models, and/or agentic workflows Experience with AWS SageMaker Nice-to-have requirements: Experience with AI/ML-driven chip EDA software tooling (either open-source or commercial tools) Experience with designing chips (either open-source or commercial designs) Benefits: Generous salary and equity package Full health/vision/dental/401k benefits Team meals — Apply to chat with the founders about the details!

We’re looking for a key engineer that wants to be the first line of response with our customers. This is a technical software role that requires both customer support acumen and technical ability across VLSI/software development. Who you are: You want to be the first line of response with customers. You want to bridge the gap between customer support and software development, and you’re excited to do both. You move fast – by being resourceful, a self-starter, and caring intensely about the quality of your work. You want to work at a scrappy startup that sets and meets aggressive goals. You want to own/drive core product and write/ship code every day. You are excited about transforming the way chips are built by the entire chip industry. If this sounds like you, please apply to join the team! What you’ll do: Manage our customer-facing issues and be the first line of response Maintain a strong understanding of our technical stack so you can resolve low-hanging customer issues Forward more complicated requests and issues to the engineering team with the right context Write code (Python/C++) that ships to Fortune 500s and chip unicorns Synthesize user feedback into product updates/features Minimum requirements: Passionate and excited about chips and AI for EDA Experienced with designing ASICs using SystemVerilog and synthesis/verification tools (open-source and/or commercial) Experienced with common front-end EDA tools Good at writing/shipping high-quality code (Python/C++) quickly Basic knowledge of statistics & AI/ML methods Resilient, data-driven, and works from first principles Ideal requirements: 1+ tapeouts (ideally on advanced technology nodes) Contributor to open-source EDA/chip efforts Significant experience with PPA optimization and/or functional correctness convergence Benefits: Generous salary and equity package Full health/vision/dental/401k benefits Team meals — Apply to chat with the founders about the details!