Zettascale

We're Building the Next Generation of Chips to Power AI. Join Us. At Zetta, we're building the next NVIDIA to accelerate AI discovery. Our XPU chips are state-of-the-art AI compute engines, versatile and efficient enough to support AGI, and eventually ASI, without requiring massive power infrastructure. The team consists of exceptional engineers obsessed with pushing the boundaries of what's possible in computing, and we're now seeking an Executive Assistant to keep the CEO and the team running, handle the day-to-day, and make sure nothing slips through the cracks! You Are Ready to go all-in and do the work of your life The person who quietly makes everything run, so everyone else can stay focused on building An organizational powerhouse who loves owning operations, logistics, and the details other people forget Happy to take the boring, time-consuming, unglamorous stuff off other people's plates and just handle it A natural people person who notices when someone's struggling before they say a word Deeply passionate about keeping a team happy, healthy, and excited to show up Your Background (important in bold) Background as an executive assistant, operations coordinator, or equivalent experience Strong organizational fundamentals (calendars, scheduling, inboxes, deadlines, follow-ups, nothing slips) Owns office and life logistics (travel, expenses, appointments, errands, vendors, equipment, the boring stuff) People and culture instincts (morale, team rituals, celebrations, making people love showing up) Team and event planning (offsites, dinners, birthdays, milestones, the little things that build culture) Recruiting coordination (scheduling interviews, candidate communication, a smooth, warm experience) Strong written and verbal communication (internal updates, comms, representing the CEO when needed) Sound judgment with confidential and personal information and a strong bias toward action Huge Plus If Early-stage startup experience (fewer than 20 people, ideally deep tech, hardware, or AI) 1+ years (or equivalent) directly supporting a technical founder or executive Experience planning team events and building light culture rituals from scratch Familiarity with the AI, semiconductor, or hardware world Fluency with modern ops tooling (Notion, Linear, Google Workspace, calendar and travel tools) Someone who doesn't fret when faced with chaos and brings calm and order wherever they go The Opportunity Be one of the first employees and the person who keeps the whole thing humming Work directly with the founding team of exceptional engineers at our San Francisco HQ Own operations, scheduling, events, and the day-to-day so the team can stay locked in on the mission Be the heartbeat of the team's culture and morale as we grow Grow with the company as we scale Highly competitive compensation + meaningful equity This is THE chance to do the work of your life. The chance to be the person behind the people building something that will be remembered. To help power a technical moonshot that will actually matter for over 100 to 1,000 years.

We're Building the Next Generation of Chips to Power AI. Join Us. At Zetta, we're building the next NVIDIA to accelerate AI discovery. Our XPU chips are state-of-the-art AI compute engines, versatile and efficient enough to support AGI, and eventually ASI, without requiring massive power infrastructure. The team consists of exceptional engineers obsessed with pushing the boundaries of what's possible in computing, and we're now seeking our next technical member! You Are Ready to go all-in and do the work of your life Willing to be hardcore when pushing technical boundaries A technical powerhouse who loves working across the hardware-software boundary Deeply passionate and obsessed with computing and AI Hungry to build something that actually matters Your Background (important in bold) Background in Electrical Engineering, Computer Engineering, or equivalent field Strong digital design fundamentals (VLSI, RTL, pipelining, clocking/reset strategy, latency/throughput tradeoffs, clean microarchitecture) RTL quality discipline (lint, CDC/RDC, X-prop awareness, assertions/SVA, code review hygiene) Synthesis/constraints expertise (SDC constraints, synthesis/PPA iteration, timing closure with physical design) Proficiency with front-end toolchains (VCS/Xcelium/Questa, Verilator, SpyGlass-style linting, DC/Genus-class synthesis) Build/flow automation and tooling (Python, Tcl, Nix) Work across architecture, verification, and physical design to hit PPA targets (area/power/perf) Experience designing compute datapaths and memory subsystems for AI accelerators, GPUs, or high-performance CPUs (bandwidth/latency-driven design) Huge Plus If High-speed interface/IP integration experience (PCIe, CXL, DDR/HBM, Ethernet, SerDes) 1+ years (or equivalent) designing synthesizable RTL (SystemVerilog/Verilog) for ASICs and/or high-performance FPGA prototypes HW/SW boundary experience (drivers/firmware bring-up, performance counters, profiling, build systems) Experience with systems programming (Linux kernel modules, low-level) Autodidactic polymath with a strong mathematical background Previous tapeout experience through university and/or professional projects Someone who doesn't fret when faced with near-impossible technical challenges The Opportunity Be one of the first employees shaping a revolutionary technology Work directly with the founding team of exceptional engineers at our San Francisco HQ Own critical decisions that will influence the future of AI compute Grow into a technical leader as we scale Highly competitive compensation + significant equity This is THE chance to do the work of your life. The chance to build something that will be remembered. To go hardcore on a technical moonshot that will actually matter for over 100 to 1,000 years.